ASIC RTL Design Engineer

Job Overview:

The Arm Security Technology Team is seeking a highly motivatedStaff ASIC Front-End Design Engineerto lead the design and development of complex security and compute subsystems for advanced SoC platforms.

This exciting opening focuses on efficient microarchitecture development, high-quality RTL implementation, and design closure. The position emphasizes front-end EDA methodologies and design PPA (power, performance, area) analysis and optimization.

The preferred candidate will be part of a team that combines expertise inRTL design and ASIC front-end design methodologies, including synthesis, timing closure, structural signoff checks, and design optimization flows.

You will collaborate on architecture, verification, and implementation partners to deliver robust, synthesis and timing-clean designs that meet ambitious PPA targets. This role requires technical leadership, teamwork, and mentorship in RTL quality, design methodology, and front-end design closure practices.

Responsibilities:

• Develop high-quality SystemVerilog/Verilog RTL implementations aligned with architecture and design requirements.
• Contribute to microarchitecture definition and design trade-off analysis to optimize functionality, performance, and implementation efficiency. Apply microarchitecture and RTL-level power analysis and reduction techniques to improve PPA early in the design cycle.
• Develop designs that are synthesis-clean, timing-clean, and structurally robust throughout the development cycle.
• Develop and refine SDC and UPF constraints ensuring timing convergence and robust power domain implementation.
• Lead front-end design structural check closure including CDC and RDC verification, lint and structural design checks, logic equivalence checking (LEC), and DFT readiness.
• Manage and optimize complex power designs including VCLP and multi-voltage domains and advanced low-power methodologies.

Required Skills and Experience :

• Strong understanding of full ASIC flow: RTL → Synthesis → P&R → Signoff → GDS.
• Proven experience with ASIC front-end design and verification methodologies including: synthesis, static timing analysis, CDC / RDC analysis, lint and structural checks, LEC, and constraint development.
• Competency analyzing and optimizing designs for power, performance, and area (PPA).
• Solid understanding of SoC architecture concepts including: multi-clock and reset architectures, standard bus protocols (AXI, AHB), IP and subsystem integration.
• Experience with scripting and automation using Python, Tcl, Perl, or similar languages.

“Nice To Have” :

• Familiarity working withmulti-power-domain designs and UPF-based flows.
• Experience with advanced process nodes and large-scale SoC development.
• Familiarity with formal verification tools and methodologies.
• Experience collaborating closely with physical design and CAD teams on design closure.
• Experience supporting post-silicon debug and validation.

In Return:

We are proud to have a set of behaviours that reflect our culture and guide our decisions, defining how we work together to innovate, defy ordinary, and shape outstanding products!

• Partner and Customer focus – We anticipate and exceed customer needs.
• Teamwork and Communication – We collaborate optimally across diverse teams.
• Creativity and Innovation – We challenge the status quo. We develop careers and personal growth.
• Impact and influence – We deliver measurable, trusted results.
• Deliver on your promises –You demonstrate ownership and accountability.
• United in Purpose, Empowered Through Inclusion – We value diversity to build better solutions.

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Accommodations at Arm

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.

Hybrid Working at Arm

Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.