Job Description:
As a Principal Engineer in Arm's Solutions Engineering group we like to think we are not just crafting sophisticated SoCs, but we are defining future chip design techniques. Not only do we improve the power, performance and system integration of our products, but we also craft the design flows, influence Electronic Design Automation (EDA) tools and build the knowledge base that makes custom SoC and CPU chip design possible. At Arm, our work goes beyond multiple divisions where we drive improved implementation for Arm and our partners. A key component of this is around the development of comprehensive implementation and analysis methodologies.
Responsibilities:
- Synthesis, Physical design and implementation of CPU cores, system interconnect and other ARM IP.
- Analyze design timing, area and power to help improve the quality of ARM IP.
- Develop and deploy new methodologies to improve implementation efficiency and results.
- Support and develop detailed implementation analysis and data-mining methodologies.
- Work with implementation and physical IP RTL design teams to drive analysis and optimization of our IP.
- Converting R&D concepts into real implementation solutions.
- Enable our partners to achieve the best possible quality of results.
Required Skills and Experience :
- Bachelors or Master’s degree equivalent in Electrical Engineering, Computer Engineering or other relevant technical fields.
- 12+ years of proven experience in ASIC Implementation, Physical design, STA and Timing closure, Structured clock tree, PDN analysis, DFM and Physical verification.
- Possess a high level of dedicated, initiative and problem-solving skills.
- Experience in crafting and adopting new silicon implementation techniques and methodologies and promote their use with international teams.
- Previous experience in and knowledge of the entire IC design flow, from RTL through to GDS2.
- Experience working closely in top and block level Synthesis, Floor planning, Place and Route, CTS, logical and physical optimization, timing closure and power analysis flows.
- Proven programming and scripting skills eg. Tcl, Perl and R.
“Nice To Have” Skills and Experience :
- Knowledge around Arm based SoCs!
- Experience with a wide range of programming, scripting & data presentation languages Eg. Tcl, sh, csh, make, R, C, C++, Java, JS, HTML, Perl, Python and Ruby.
- Experience with low power design techniques (power gating, voltage/frequency scaling).
- Experience with Verilog RTL design.
- Experience with ATPG tools/and or production testing.
In Return:
Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of any characteristic.
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Accommodations at Arm
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Hybrid Working at Arm
Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.
Equal Opportunities at Arm
Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.