Coherent Interconnect Power Engineer

Job Overview:

Are you ready for a new and exciting challenge? If you are a self-motivated and expert in power methodology, ground breaking power tools, power efficient design and methodology looking to make a difference in an innovative and inclusive team, you’ve come to the right place!

The candidate will join the ARM System IP Power team responsible for maintaining and establishing power methodology, incorporating new innovative power EDA tool to measure, project, analyze and provide power-efficient design feedback to logic design team.

The candidate should have a detailed and hand-on understanding modern EDA tools, power measurement and analysis technology. Candidate should have successfully taken real-world complex VLSI design through PPA optimization cycle for multiple design cycles. Experience in low-power design techniques, Power efficient micro-architecture and a full understand PPA design requirement and impact on performance, implementation is a Must.

In addition, the candidate would fully apply engineering resourcefulness and soft skills to collaborate with peer teams like implementation, design, performance, verification, and project management.

Responsibilities:

• Ownership of the Interconnect IP Power
• Plan, implement, track, and coordinate of all power related tasks to meet high quality PPA requirement of the design
• Work with Architecture, Design, Implementation, and SoC team to establish PPA goal, low power design technique, power reduction features
• Work with Implementation, Performance SoC team to plan and deliver power measurement and analysis process for IP power estimation and projection and roll-up into SoC power budget
• Improve, Propose, Implement Power methodology across the System IP group and wider Arm design community
• Provide direction and mentoring to other junior members of the team

Required Skills and Experience:

• History of high quality, low power, complex micro-architecture and RTL implementations in reasonable timescales
• Experience with modern EDA power tools
• Micro-architecture experience in fabric, interconnect, and bridge design
• Knowledge of high-speed interfaces such as AMBA CHI and/or AXI, CXL, CHI C2C
• Familiarity with PCI Express (PCIe), DDR is a plus
• Knowledge of topics including transaction ordering, virtualization, MMUs, cache coherence, and host bridge functions
• Experience with synthesis, static timing
• Experience with scripting languages like Python, Perl, Ruby, etc., and competence with Unix/Linux, shells, and Makefiles
• Strong communication, teamwork, and presentation skills
• Minimum Bachelors or Masters degree in Computer Engineering/Electrical Engineering

In Return:

• Arm is architecting a dynamic place where people love to work.
• Be part of ARM Austin-based Interconnect team and engage with the world’s most famous technology companies
• This team's mission is crafting scalable and power efficient IP for connected AMBA-compliant SoC connectivity and can be customized for multiple performance points.

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Accommodations at Arm

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Hybrid Working at Arm

Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.