Staff Verification Engineer

Job Overview:

Are you a passionate verification engineer who loves to work on complex systems, building test environments which finds all the bugs before anyone can? Are you keen on learning new techniques and adopting the state-of-the-art of functional verification?

The GPU team produces graphics hardware and software products for mobile and embedded devices. Our Mali™ Graphics Processors (GPUs) have an advanced, highly programmable architecture for accelerating 2D and 3D graphics, specifically tuned for performance and energy efficiency. Our flagship multi-core GPU sets a new standard for graphics and compute performance with low energy consumption.

With offices around the world, Arm is a diverse organisation of dedicated, innovative and highly passionate engineers. By enabling a vibrant, inclusive workplace where all our people can grow and succeed, we encourage our people to share their unique contributions to Arm's success in the global marketplace.

We have a great opportunity for a highly motivated verification engineer to join a fast-growing team and develop our next generation of performance / low power GPUs.

As an important member of our development team you'll predominantly be involved with employing constrained-random coverage driven simulation techniques using SystemVerilog and UVM. You'll be responsible for adopting new methodologies to improve how we do IP verification in collaboration with other experienced engineers across our team.

You'll contribute to picking the right tool for the job, whether that is a stand-alone SystemVerilog testbench, a formal environment, or properly verifying a unit from a higher level simulation environment.

Responsibilities:

The role covers the development and deployment of methodologies as well as direct hands-on test bench development. Your main day-to-day responsibilities will be:

• Full ownership of verification from the test planning phase to project closure.
• Keeping verification environments up to date with the latest standard methodology and adopting new tools for maintaining a high level of code quality.
• Reviewing other team members' proposed changes to both RTL and verification code.
• Continuously improving the verification effort by keeping a keen eye on collected metrics, employing data science was possible to get the most out of each spent CPU cycle.

Required Skills and Experience :

You will need to have a good understanding of constrained-random verification and experience from a suitably complex verification environment.

You're comfortable using SystemVerilog to develop re-usable verification components and are familiar with the tools and processes for developing test benches as well as all other aspects of the verification process.

• Experience with SystemVerilog for verification of complex design IP.
• Experience developing re-usable and scalable code by following OOP design principles.
• Good interpersonal skills and ability to work well as part of a team.
• Ability to own all stages of a project to completion.

“Nice To Have” Skills and Experience :

• Experience with formal verification.
• Knowledge of graphics principles.
• Experience with scripting (Linux, Python).
• Knowledge of C / C++ / Java / C# / other high-level programming languages.
• Experience of formal sequential equivalence checking.
• Experience with Functional Safety aspects of Design / Verification, knowledge of ISO 26262

In Return:

All arm employees are provided with vital training to succeed in their respective roles. As well as a friendly and high-performance working environment, Arm offers a competitive benefits package in Norway including private medical insurance, 6 weeks of annual leave, sabbatical, supplementary pension, and wellness benefits.

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Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of any characteristic.