RTL Design Engineer

About the Role

As an Interconnect RTL Design Engineer, you will be part of the Systems team focused on next-generation interconnects targeting high-end mobile, networking, and enterprise markets. You will take active part in specification, microarchitecture and RTL design of high-performance, energy-efficient interconnects. This opportunity is specific to a confidential project, and as part of this small and hardworking team, you will expand your technical breadth in ground breaking interconnects, including multi-chip, IO acceleration, and new memory technologies. In addition, your close collaboration with other Austin-based CPU and System IP engineering teams leads to complete IP solutions to address the performance, power and cost requirements for almost all application markets.

What will I be accountable for?

As an RTL Design Engineer, you would be accountable for one or more functional units of the Interconnect while working closely with performance modeling, validation, and implementation teams to meet all functional requirements and performance, power, area (PPA) goals. Typical accountabilities include:

• Understanding the high-level specification and requirements of functional units of Interconnect products.
• Define the Micro-architecture for a unit
• Develop Verilog RTL logic design for the unit
• Collaborate with verification team on the test plan development for the blocks and verification closure
• Debug functional or performance issues with the RTL using simulation and debug tools
• Analyze synthesis/timing reports, identify and address critical areas to meet the PPA targets
• Own one or more design automation flows (e.g. lint, CDC checking, IPXACT). Identify and implement enhancements to flows in collaboration with the methodology group.

What skills, experience and qualifications do I need?

• Education BS or MS in Electrical Engineering or Computer Engineering
• Prior RTL design experience is required.
• Prior verification or CAD experience is a plus
• An ideal candidate will have between 5-10 years of work experience in microprocessor, SoC, memory controller and interconnect IP design.

Technical Attributes

• Experience with interconnect and bus architectures (with proficiency in IO acceleration, PCIe, system caching, QoS)
• Knowledge of cache coherence and bus protocols (e.g. AMBA5 ACELite, AXI, CHI, AHB, APB) is a plus.
• Experience with Verilog or System Verilog based RTL design, with a focus on specified frequency, power, and area targets
• Knowledge of scripting languages python, perl, formats (json, yaml)
• Processor system knowledge including basic understanding of SoC systems as well as operating system software

Personal Attributes

• Demonstrate enthusiasm, drive and diligence
• Work well in a team environment
• Have excellent written and verbal communication skills
• Be motivated to continuously develop skills and accept a variety of responsibilities as part of contributing to the design center’s success
• Be able to travel for training or occasional customer interaction

At Arm, we are guided by our core beliefs that reflect our open culture and guide our decisions, defining how we work together to defy ordinary and shape extraordinary:

We Not I

• Take daily responsibility to make the Global Arm community thrive
• No individual owns the right answer. Brilliance is collective
• Information is crucial, share it
• Realize that we win when we collaborate — and that everyone misses out when we don’t

Passion for Progress

• Our differences are our strength. Widen and mix up your network of connections
• Difficult things can take unexpected directions. Stick with it
• Make feedback positive and expansive, not negative and narrow
• The essence of progress is that it can’t stop. Grow with it and own your own progress

Be Your Brilliant Self

• Be upbeat not egocentric
• Recognize the power in saying ‘I don’t know’
• Make trust our default position
• Hold strong opinions lightly

We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform crucial job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

#LI-SA1

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of any characteristic.